Hardware Architecture

An Energy-Efficient Near-Data Processing Accelerator for DNNs that Optimizes Data Accesses

An Energy-Efficient Near-Data Processing Accel...

Hardware Architecture
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Bahareh Khabbazan
48 views
Design Space Exploration of Sparsity-Aware Application-Specific Spiking Neural Network Accelerators

Design Space Exploration of Sparsity-Aware App...

Hardware Architecture
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Ilkin Aliyev
47 views
Analytical Die-to-Die 3D Placement with Bistratal Wirelength Model and GPU Acceleration

Analytical Die-to-Die 3D Placement with Bistra...

Hardware Architecture
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Peiyu Liao
49 views
MEDUSA: Scalable Biometric Sensing in the Wild through Distributed MIMO Radars

MEDUSA: Scalable Biometric Sensing in the Wild...

Hardware Architecture
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Yilong Li
56 views
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources

Victima: Drastically Increasing Address Transl...

Hardware Architecture
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Konstantinos Kanellopoulos
77 views
Swordfish: A Framework for Evaluating Deep Neural Network-based Basecalling using Computation-In-Memory with Non-Ideal Memristors

Swordfish: A Framework for Evaluating Deep Neu...

Hardware Architecture
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Taha Shahroodi
49 views
Co-Optimizing Cache Partitioning and Multi-Core Task Scheduling: Exploit Cache Sensitivity or Not?

Co-Optimizing Cache Partitioning and Multi-Cor...

Hardware Architecture
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Binqi Sun
56 views
SimplePIM: A Software Framework for Productive and Efficient Processing-in-Memory

SimplePIM: A Software Framework for Productive...

Hardware Architecture
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Jinfan Chen
67 views
Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm

Trikarenos: A Fault-Tolerant RISC-V-based Micr...

Hardware Architecture
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Michael Rogenmoser
52 views
GateSeeder: Near-memory CPU-FPGA Acceleration of Short and Long Read Mapping

GateSeeder: Near-memory CPU-FPGA Acceleration ...

Hardware Architecture
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Julien Eudine
57 views
A Resource-efficient FIR Filter Design Based on an RAG Improved Algorithm

A Resource-efficient FIR Filter Design Based o...

Hardware Architecture
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Mengwei Hu
51 views
Subtractor-Based CNN Inference Accelerator

Subtractor-Based CNN Inference Accelerator

Hardware Architecture
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Victor Gao
50 views
JugglePAC: A Pipelined Accumulation Circuit

JugglePAC: A Pipelined Accumulation Circuit

Hardware Architecture
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Ahmad Houraniah
58 views